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New X-NAND Flash Tech Doubles Flash Write Speeds

The company behind X-NAND flash memory claims to have doubled the speed of its storage for its second generation of chips, as reported by Blocks and Files (opens in new tab), by enabling data writes in parallel. This way, X-NAND can deliver SLC levels of performance from QLC flash, which is cheaper and comes in larger capacities.

Neo Semiconductor’s X-NAND architecture can be applied to all generations of flash memory and involves dividing each plane of the 3D matrix into four to 16 sub-planes, each of which can be accessed in parallel, using page buffers to optimize speed. Gen 2 X-NAND (opens in new tab) (PDF) takes this idea and compresses it down, using one plane to write to another, whereas before, it would have used three planes to write to a fourth. See our feature here for a fuller write-up of how the technology works.